The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description which may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
A comparator circuit compares an input to a reference. Referring now to FIG. 1A, a differential comparator 10 compares input voltages Vin+ and Vin− to reference voltages Vref+ and Vref− respectively. A timing circuit (not shown) controls switches S1, S2, S3, and S4. With switches S1 and S2 closed and switches S3 and S4 in position 1, capacitors C1 and C2 are first charged to reference voltages Vref+ and Vref−, respectively. Thereafter, with switches S1 and S2 open and switches S3 and S4 in position 2, the differential comparator 10 compares input voltages Vin+ and Vin− to reference voltages Vref+ and Vref−, respectively.
Referring now to FIG. 1B, a differential difference comparator 50 converts a difference between (Vin+ and Vref+) and a difference between (Vin− and Vref−) into currents. The comparator 50 generates an output based on a difference between voltages across resistors R1 and R2 generated by the currents. Comparator 50, however, is sensitive to a difference between input and reference common-mode voltages. Input common-mode voltage is defined as Vincm=(Vin++Vin−)/2, and reference common-mode voltage is defined as Vrefcm=(Vref++Vref−)/2. Thus, comparator 50 may not function properly unless common-mode voltages are regulated.